ADS5292
Description
Using CMOS process technology and innovative circuit techniques, the ADS5292 is a low power 80MSPS 8-Channel ADC. Low power consumption, high SNR, low SFDR, and consistent overload recovery allow users to design high performance systems.
Key Features
- Maximum Sample Rate: 80 MSPS/12-Bit
- High Signal-to-Noise Ratio - 70-dBFS SNR at 5 MHz/80 MSPS - 71.5-dBFS SNR at 5 MHz/80 MSPS and Decimation Filter = 2 - 85-dBc SFDR at 5 MHz/80 MSPS
- Low Power Consumption - 48 mW/CH at 50 MSPS - 54 mW/CH at 65 MSPS - 66 mW/CH at 80 MSPS (2 LVDS Wire Per Channel)
- Digital Processing Block - Programmable FIR Decimation Filter and Oversampling to Minimize Harmonic Interference - Programmable IIR High Pass Filter to Minimize DC Offset - Programmable Digital Gain: 0 dB to 12 dB - 2- or 4- Channel Averaging
- Flexible Serialized LVDS Outputs: - One or Two wires of LVDS Output Lines per Channel Depending on ADC Sampling Rate - Programmable Mapping Between ADC Input Channels and LVDS Output PinsEases Board Design - Variety of Test Patterns to Verify Data Capture by FPGA/Receiver
- Internal and External References
- 1.8V Operation for Low Power Consumption
- Low-Frequency Noise Suppression
- Recovery From 6-dB Overload within 1 Clock Cycle
- Package: 12-mm × 12-mm 80-Pin QFP
