ADS5545 Datasheet | Texas Instruments

.ti. SLWS180C - NOVEMBER 2005 - REVISED MAY 2007 14-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS Features - Maximum Sample Rate: 170 MSPS - 14-Bit Resolution - No Missing Codes - Total Power Dissipation 1.1 W - Internal Sample and Hold - 74-dBFS SNR at 70-MHz IF - 85-dBc SFDR at 70-MHz IF, 0 dB gain - 11.4 ENOB Minimum at 70-MHz IF - Double Data Rate (DDR) LVDS and Parallel CMOS Output Options - Programmable Gain up to 6 dB for SNR/SFDR Trade-Off at High IF - Reduced Power Modes at Lower Sample Rates - Supports input clock amplitude down to 400 mVPP - Clock Duty Cycle Stabilizer - No External Reference Decoupling Required - Internal and External Reference Support -...