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ADS58J63 - 500-MSPS Telecom Receiver

Datasheet Summary

Description

The ADS58J63 is a low-power, wide-bandwidth, 14bit, 500-MSPS, quad-channel, telecom receiver device.

The ADS58J63 supports a JESD204B serial interface with data rates up to 10 Gbps with one lane per channel.

Features

  • 1 Quad Channel.
  • 14-Bit Resolution.
  • Maximum Clock Rate: 500 MSPS.
  • Input Bandwidth (3 dB): 900 MHz.
  • On-Chip Dither.
  • Analog Input Buffer with High-Impedance Input.
  • Output Options:.
  • Rx: Decimate-by-2 and -4 Options with LowPass Filter.
  • 200-MHz Complex Bandwidth or 100-MHz Real Bandwidth Support.
  • DPD FB: Burst Mode with 14-Bit Output.
  • 1.9-VPP Differential Full-Scale Input.
  • JESD204B Interface:.

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Datasheet Details

Part number ADS58J63
Manufacturer Texas Instruments
File Size 5.33 MB
Description 500-MSPS Telecom Receiver
Datasheet download datasheet ADS58J63 Datasheet
Additional preview pages of the ADS58J63 datasheet.

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Full PDF Text Transcription

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADS58J63 SBAS717A – JUNE 2015 – REVISED JUNE 2015 ADS58J63 Quad-Channel, 14-Bit, 500-MSPS Telecom Receiver Device 1 Features •1 Quad Channel • 14-Bit Resolution • Maximum Clock Rate: 500 MSPS • Input Bandwidth (3 dB): 900 MHz • On-Chip Dither • Analog Input Buffer with High-Impedance Input • Output Options: – Rx: Decimate-by-2 and -4 Options with LowPass Filter – 200-MHz Complex Bandwidth or 100-MHz Real Bandwidth Support – DPD FB: Burst Mode with 14-Bit Output • 1.
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