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CD54HCT00J - Quadruple 2-Input NAND Gates

This page provides the datasheet information for the CD54HCT00J, a member of the CD54HC00 Quadruple 2-Input NAND Gates family.

Datasheet Summary

Description

This device contains four independent 2-input NAND gates.

B in positive logic.

Features

  • LSTTL input logic compatible.
  • VIL(max) = 0.8 V, VIH(min) = 2 V.
  • CMOS input logic compatible.
  • II ≤ 1 µA at VOL, VOH.
  • Buffered inputs.
  • 4.5 V to 5.5 V operation.
  • Wide operating temperature range:.
  • 55°C to +125°C.
  • Supports fanout up to 10 LSTTL loads.
  • Significant power reduction compared to LSTTL logic ICs 2.

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Datasheet preview – CD54HCT00J

Datasheet Details

Part number CD54HCT00J
Manufacturer Texas Instruments
File Size 1.00 MB
Description Quadruple 2-Input NAND Gates
Datasheet download datasheet CD54HCT00J Datasheet
Additional preview pages of the CD54HCT00J datasheet.

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Full PDF Text Transcription

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www.ti.com CD74HCT00, CD54HCT00 CD74SHCHCST30980,–CJADN5U4AHRYC2T00201 SCHS398 – JANUARY 2021 CDx4HCT00 Quadruple 2-Input NAND Gates with TTL-Compatible Inputs 1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 µA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: –55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL logic ICs 2 Applications • Alarm / tamper detect circuit • S-R latch 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 3 Description This device contains four independent 2-input NAND gates. Each gate performs the Boolean function Y = A ● B in positive logic.
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