CD74ACT161
Key Features
- an internal carry look-ahead for application in high-speed counting designs
- This mode of operation eliminates the output counting spikes that normally are associated with synchronous (ripple-clock) counters
- A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform
- The clear function is asynchronous
- The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating
- Instrumental in acplishing this function are ENP, ENT, and a ripple-carry output (RCO)
- Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO
- Enabling RCO produces a high-level pulse while the count is maximum (9 or 15, with QA high)
- This high-level overflow ripple-carry pulse can be used to enable successive cascaded stages
- Transitions at ENP or ENT are allowed, regardless of the level of CLK
