CD74FCT653
Features
- Buffered Inputs
- Typical Propagation Delay:
NOFOTUs RRe ECNCMEOOWSMDTMe Ec Eh SNn Io GDlo NEg SDy
6.8ns at VCC = 5V, TA = 25o C, CL = 50p F
- CD74FCT653
- Inverting
- CD74FCT654
- Non-Inverting
Description
The CD74FCT653 and CD74FCT654 octal bus transceivers/registers use a small geometry Bi CMOS technology. The output stage is a bination of bipolar and CMOS transistors that limits the output HIGH level to two diode drops below VCC. This resultant lowering of output swing (0V to 3.7V) reduces power bus ringing (a source of EMI) and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64m A.
- SCR Latchup Resistant Bi CMOS Process and Circuit Design
- Speed of Bipolar FAST™/AS/S
- 64m A Output Sink Current
- Output Voltage Swing Limited to 3.7V at VCC = 5V
- Controlled Output Edge Rates
- Input/Output Isolation to VCC
- Bi CMOS Technology with Low Quiescent...
