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CD74HC174 - Hex D-Type Flip-Flop

General Description

The ’HC174 and ’HCT174 are edge triggered flip-flops which utilize silicon gate CMOS circuitry to implement D-type flipflops.

They possess low power and speeds comparable to low power Schottky TTL circuits.

The devices contain six masterslave flip-flops with a common clock and common reset.

Key Features

  • Buffered Positive Edge Triggered Clock.
  • Asynchronous Common Reset.
  • Fanout (Over Temperature Range) - Standard Outputs.
  • 10 LSTTL Loads - Bus Driver Outputs.
  • . . . 15 LSTTL Loads.
  • Wide Operating Temperature Range . . . -55oC to 125oC.
  • Balanced Propagation Delay and Transition Times.
  • Significant Power Reduction Compared to LSTTL Logic ICs.
  • HC Types - 2V to 6V Operation - High Noise Immunity: NI.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data sheet acquired from Harris Semiconductor SCHS159C August 1997 - Revised October 2003 CD54HC174, CD74HC174, CD54HCT174, CD74HCT174 High-Speed CMOS Logic Hex D-Type Flip-Flop with Reset [ /Title (CD74 HC174 , CD74 HCT17 4) /Subject (High Speed CMOS Logic Hex DType FlipFlop Features • Buffered Positive Edge Triggered Clock • Asynchronous Common Reset • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.