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CD74HC4017ĆEP HIGHĆSPEED CMOS LOGIC DECADE COUNTER/DIVIDER
WITH 10 DECODED OUTPUTS SCLS550 − DECEMBER 2003
D Controlled Baseline
− One Assembly/Test Site, One Fabrication Site
D Extended Temperature Performance of
−40°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D Fully Static Operation D Buffered Inputs D Common Reset D Positive Edge Clocking D Typical fmax = 60 MHz at VCC = 5 V,
CL = 15 pF, TA = 25°C
† Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.