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CDx4HCT10 Triple 3-Input NAND Gates
CD74HCT10, CD54HCT10
SCHS404 – JUNE 2020
1 Features
• LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V
• CMOS input logic compatible – II ≤ 1 µA at VOL, VOH
• Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range:
-55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power reduction compared to LSTTL
logic ICs
2 Applications
• Alarm / tamper detect circuit • S-R latch
3 Description
This device contains three independent 3-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
CD74HCT10M
SOIC (14)
8.70 mm × 3.90 mm
CD74HCT10E
PDIP (14)
19.30 mm × 6.40 mm
CD54HCT10F
CDIP (14)
21.30 mm × 7.