CD74HCT74 Datasheet | Texas Instruments

Features Description - Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times - Asynchronous Set and Reset - plementary Outputs - Buffered Inputs - TTAyp=ic2a5lof CMAX = 50MHz at VCC = 5V, CL = 15p F, - Fanout (Over Temperature Range) - Standard Outputs - - - 10 LSTTL Loads - Bus Driver Outputs - - . . . 15 LSTTL Loads - Wide Operating Temperature Range . . . -55o C to 125o C - Balanced Propagation Delay and Transition Times The ’HC74 and ’HCT74 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads. This flip-flop has independent DATA, SET, RESET and CLOCK inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive-going transition of the clock pulse. SET and RESET are independent of the clock and are acplished by a low level at the appropriate input. The HCT logic family is functionally as well as pin patible with the standard LS logic family. Ordering Information - Significant Power Reduction pared to LSTTL Logic ICs - HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V - HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic patibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input patibility, Il ≤ 1µA at VOL, VOH PART NUMBER TEMP. RANGE (o C) PACKAGE CD54HC74F3A -55 to 125 14 Ld CERDIP CD54HCT74F3A -55 to 125 14 Ld CERDIP CD74HC74E -55 to 125 14 Ld...