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CDCE72010
www.ti.com
SCAS858C – JUNE 2008 – REVISED JANUARY 2012
Ten Output High Performance Clock Synchronizer, Jitter Cleaner, and Clock Distributor
Check for Samples: CDCE72010
FEATURES
1
• High Performance LVPECL, LVDS, LVCMOS PLL Clock Synchronizer
• Two Reference Clock Inputs (Primary and Secondary Clock) for Redundancy Support with Manual or Automatic Selection
• Accepts Two Differential Input (LVPECL or LVDS) References up to 500MHz (or Two LVCMOS Inputs up to 250MHz) as PLL Reference
• VCXO_IN Clock is Synchronized to One of Two Reference Clocks
• VCXO_IN Frequencies up to 1.