CDCLVP1208
Description
The CDCLVP1208 is a highly versatile, low additive jitter buffer that can generate eight copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of munication applications.
Key Features
- 1 2:8 Differential Buffer
- Selectable Clock Inputs Through Control terminal
- Universal Inputs Accept LVPECL, LVDS, and
- Eight LVPECL Outputs
- Maximum Clock Frequency: 2 GHz
- Maximum Core Current Consumption: 73 mA
- Very Low Additive Jitter: <100 fs,rms in 10 kHz to
- 2.375-V to 3.6-V Device Power Supply
- Maximum Propagation Delay: 450 ps
- Maximum Output Skew: 20 ps
Applications
- Wireless munications
