CDCLVP1208 Description
The CDCLVP1208 is a highly versatile, low additive jitter buffer that can generate eight copies of LVPECL clock outputs from one of two selectable LVPECL, LVDS, or LVCMOS inputs for a variety of munication applications. It has a maximum clock frequency up to 2 GHz.
CDCLVP1208 Key Features
- 1 2:8 Differential Buffer
- Selectable Clock Inputs Through Control terminal
- Universal Inputs Accept LVPECL, LVDS, and
- Eight LVPECL Outputs
- Maximum Clock Frequency: 2 GHz
- Maximum Core Current Consumption: 73 mA
- 57 fs, rms (typical) at 122.88 MHz
- 48 fs, rms (typical) at 156.25 MHz
- 30 fs, rms (typical) at 312.5 MHz
- 2.375-V to 3.6-V Device Power Supply