DRA787 Overview
The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8 mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (FCBGA) package. The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto...
DRA787 Key Features
- Architecture designed for infotainment
DRA787 Applications
- Architecture designed for infotainment applications
- Up to 2 C66x floating-point VLIW DSP
- Fully object-code patible with C67x and C64x+
- Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
- Up to 512kB of on-chip L3 RAM