Datasheet4U Logo Datasheet4U.com

DRA80M - Infotainment Applications Processor

Key Features

  • 1Processor cores:.
  • Dual- or quad-core Arm® Cortex®-A53 microprocessor subsystem at up to 1.1 GHz.
  • Up to two dual-core or two single-core Arm® Cortex®-A53 clusters with 512KB L2 cache including SECDED.
  • Each A53 core has 32KB L1 ICache and 32KB L1 DCache.
  • Dual-core Arm® Cortex®-R5F at up to 400 MHz.
  • Supports lockstep mode.
  • 16KB ICache, 16KB DCache, and 64KB RAM per R5F core Ethernet subsystem:.
  • Three industrial subsystem with Ethernet.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
DRA808M 30dBm Wireless Voice Transceiver Dorji
DRA8 8.0A Reverse Blocking Thyristor Sanyo Semicon Device
DRA818U UHF Band Voice Transceiver Dorji
DRA818V VHF Band Voice Transceiver Dorji
DRA03T 0.3A Reverse Blocking Thyristor Sanyo Semicon Device

Other Datasheets by Texas Instruments

Part Number Description
DRA829V Automotive Processor
DRA710 Infotainment Applications Processor
DRA712 Infotainment Applications Processor
DRA714 Infotainment Applications Processor
DRA716 Infotainment Applications Processor

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Product Folder Order Now Technical Documents Tools & Software Support & Community ADVANCE INFORMATION DRA80xM Jacinto™ Infotainment Applications Processor Silicon Revision 2.0 DRA80M SPRSP54 – APRIL 2020 1 Device Overview 1.1 Features 1Processor cores: • Dual- or quad-core Arm® Cortex®-A53 microprocessor subsystem at up to 1.