DS32EL0124 - FPGA-Link Deserializer

The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and optical fiber.

• 1.
• 2 5-bit DDR LVDS Parallel Data Interface.
• Programmable Receive Equalization.
• Selectable DC-Balance Decoder.
• Selectable De-Scrambler.
• Remote Sense for Automatic Detection and Negotiation of Link Status.
• No External Receiver Reference Clock Required.
• LVDS Parallel Interface.
• Programmable LVDS Output Clock Delay.
• Supports Output Data-Valid Signaling.
• Supports Keep-Alive Clock Output.
• On Chip LC VCOs.