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DS34C86T - Quad CMOS Differential Line Receiver

General Description

The DS34C86T is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.

Key Features

  • 1.
  • 2 CMOS Design for Low Power.
  • ±0.2V Sensitivity Over the Input Common Mode Voltage Range.
  • Typical Propagation Delays: 19 ns.
  • Typical Input Hysteresis: 60 mV.
  • Inputs Won't Load Line when VCC = 0V.
  • Meets the Requirements of EIA Standard RS- 422.
  • TRI-STATE Outputs for System Bus Compatibility.
  • Available in Surface Mount.
  • Open Input Failsafe Feature, Output High for Open Input.

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Full PDF Text Transcription (Reference)

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DS34C86T www.ti.com SNLS379C – MAY 1998 – REVISED APRIL 2013 DS34C86T Quad CMOS Differential Line Receiver Check for Samples: DS34C86T FEATURES 1 •2 CMOS Design for Low Power • ±0.2V Sensitivity Over the Input Common Mode Voltage Range • Typical Propagation Delays: 19 ns • Typical Input Hysteresis: 60 mV • Inputs Won't Load Line when VCC = 0V • Meets the Requirements of EIA Standard RS- 422 • TRI-STATE Outputs for System Bus Compatibility • Available in Surface Mount • Open Input Failsafe Feature, Output High for Open Input DESCRIPTION The DS34C86T is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.