Datasheet4U Logo Datasheet4U.com

DS90C124 - 5-MHz to 35-MHz DC-Balanced 24-Bit FPD-Link II Serializer/Deserializer

Download the DS90C124 datasheet PDF. This datasheet also covers the DS90C241 variant, as both devices belong to the same 5-mhz to 35-mhz dc-balanced 24-bit fpd-link ii serializer/deserializer family and are provided as variant models within a single manufacturer datasheet.

General Description

The DS90C241 and DS90C124 chipset translates a 24-bit parallel bus into a fully transparent data and control LVDS serial stream with embedded clock information.

Key Features

  • 1 5-MHz to 35-MHz Clock Embedded and DCBalancing 24:1 and 1:24 Data Transmissions.
  • User Defined Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive Up to 10-Meter Shielded Twisted-Pair Cable.
  • User-Selectable Clock Edge for Parallel Data on Both Transmitter and Receiver.
  • Internal DC Balancing Encode and Decode (Supports AC-Coupling Interface With No External Coding Required).
  • Individual Power-Down Controls for Bo.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DS90C241-etcTI.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number DS90C124
Manufacturer Texas Instruments
File Size 2.18 MB
Description 5-MHz to 35-MHz DC-Balanced 24-Bit FPD-Link II Serializer/Deserializer
Datasheet download datasheet DS90C124 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer National Semiconductor
DS90C031 LVDS Quad CMOS Differential Line Driver National Semiconductor
DS90C031B LVDS Quad CMOS Differential Line Driver National Semiconductor
DS90C032 LVDS Quad CMOS Differential Line Receiver National Semiconductor
DS90C032B LVDS Quad CMOS Differential Line Receiver National Semiconductor

Other Datasheets by Texas Instruments

Part Number Description
DS90C185 Low Power 1.8V FPD-Link Serializer
DS90C187 1.8-V Dual Pixel FPD-Link Serializer
DS90C031B LVDS Quad CMOS Differential Line Driver
DS90C031QML LVDS Quad CMOS Differential Line Driver
DS90C032 LVDS Quad CMOS Differential Line Receiver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Product Folder Order Now Technical Documents Tools & Software Support & Community DS90C124, DS90C241 SNLS209M – NOVEMBER 2005 – REVISED JANUARY 2017 DS90C241 and DS90C124 5-MHz to 35-MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer 1 Features •1 5-MHz to 35-MHz Clock Embedded and DCBalancing 24:1 and 1:24 Data Transmissions • User Defined Pre-Emphasis Driving Ability Through External Resistor on LVDS Outputs and Capable to Drive Up to 10-Meter Shielded Twisted-Pair Cable • User-Selectable Clock Edge for Parallel Data on Both Transmitter and Receiver • Internal DC Balancing Encode and Decode (Supports AC-Coupling Interface With No External Coding Required) • Individual Power-Down Controls for Both Transmitter and Receiver • Embedded Clock CDR (Clock and Data Recovery) on