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DS90C363 - +3.3V Programmable LVDS Transmitter

General Description

The DS90C363 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link.

Key Features

  • 1.
  • 23 20 to 65 MHz shift clock support.
  • Programmable Transmitter (DS90C363) strobe select (Rising or Falling edge strobe).
  • Single 3.3V supply.
  • Chipset (TX + RX) power consumption < 250 mW (typ).
  • Power-down mode (< 0.5 mW total).
  • Single pixel per clock XGA (1024×768) ready.
  • Supports VGA, SVGA, XGA and higher addressability.
  • Up to 170 Megabyte/sec bandwidth.
  • Up to 1.3 Gbps throughput.
  • Narrow bus reduces cable.

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📁 Similar Datasheet

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Other Datasheets by Texas Instruments

Part Number Description
DS90C363B +3.3V Programmable LVDS Transmitter
DS90C365A +3.3V Programmable LVDS Transmitter
DS90C3201 3.3V 8 MHz to 135 MHz Dual FPD-Link Transmitter
DS90C3202 3.3V 8 MHz to 135 MHz Dual FPD-Link Receiver
DS90C383B Programmable LVDS Transmitter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90C363, DS90CF364 www.ti.com SNLS123C – SEPTEMBER 1999 – REVISED APRIL 2013 +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link–65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link–65 MHz Check for Samples: DS90C363, DS90CF364 FEATURES 1 •23 20 to 65 MHz shift clock support • Programmable Transmitter (DS90C363) strobe select (Rising or Falling edge strobe) • Single 3.3V supply • Chipset (TX + RX) power consumption < 250 mW (typ) • Power-down mode (< 0.5 mW total) • Single pixel per clock XGA (1024×768) ready • Supports VGA, SVGA, XGA and higher addressability • Up to 170 Megabyte/sec bandwidth • Up to 1.