DS90CF364 Overview
The DS90C363 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted.
DS90CF364 Key Features
- 23 20 to 65 MHz shift clock support
- Programmable Transmitter (DS90C363) strobe
- Single 3.3V supply
- Chipset (TX + RX) power consumption < 250
- Power-down mode (< 0.5 mW total)
- Single pixel per clock XGA (1024×768) ready
- Supports VGA, SVGA, XGA and higher
- Up to 170 Megabyte/sec bandwidth
- Up to 1.3 Gbps throughput
- Narrow bus reduces cable size and cost