Datasheet4U Logo Datasheet4U.com

DS90CF384AQ - +3.3V LVDS Receiver

General Description

The DS90CF384AQ receiver converts the four LVDS data streams at up to 1.8 Gbps throughput (227 Megabytes/sec bandwidth) back into parallel 28 bits of LVCMOS/LVTTL data.

In a Display application, the 28 bits include: 24 bits of RGB data and up to 4 bits of video control (Hsync, Vsync, DE and CNTL).

Key Features

  • 1.
  • 2 Automotive Grade Device, AEC-Q100 Grade 3 Qualified.
  • Operating Temperature Range:.
  • 40°C to +85°C.
  • 20 to 65 MHz Shift Clock Support.
  • 50% Duty Cycle on Receiver Output Clock.
  • Best.
  • in.
  • Class Set & Hold Times on RxOUTPUTs.
  • Rx Power Consumption 700V (EIAJ).
  • Supports VGA, SVGA, XGA and Dual Pixel SXGA.

📥 Download Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DS90CF384AQ www.ti.com SNLS345A – AUGUST 2011 – REVISED APRIL 2013 DS90CF384AQ +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz Check for Samples: DS90CF384AQ FEATURES 1 •2 Automotive Grade Device, AEC-Q100 Grade 3 Qualified • Operating Temperature Range: –40°C to +85°C • 20 to 65 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best–in–Class Set & Hold Times on RxOUTPUTs • Rx Power Consumption <142 mW (typ) @65MHz Grayscale • Rx Power-down Mode <200μW (max) • ESD Rating >7 kV (HBM), >700V (EIAJ) • Supports VGA, SVGA, XGA and Dual Pixel SXGA. • PLL Requires No External Components • Compatible with TIA/EIA-644 LVDS Standard • Low Profile 56-Lead TSSOP Package DESCRIPTION The DS90CF384AQ receiver converts the four LVDS data streams at up to 1.