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DS90CR484A - 48-Bit LVDS

This page provides the datasheet information for the DS90CR484A, a member of the DS90CR483A 48-Bit LVDS family.

Description

The DS90CR483A transmitter converts 48 bits of CMOS/TTL data into eight LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a ninth LVDS link.

Features

  • 1.
  • 2 Up to 5.38 Gbits/sec Bandwidth.
  • 33 MHz to 112 MHz Input Clock Support.
  • LVDS SER/DES Reduces Cable and Connector Size.
  • Pre-emphasis Reduces Cable Loading Effects.
  • DC Balance Data Transmission Provided by Transmitter Reduces ISI Distortion.
  • Cable Deskew of +/.
  • 1 LVDS Data Bit Time (up to 80 MHz Clock Rate).
  • 5V Tolerant TxIN and Control Input Pins.
  • Flow Through Pinout for Easy PCB Design.
  • +3.3V Supply Voltag.

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Datasheet preview – DS90CR484A

Datasheet Details

Part number DS90CR484A
Manufacturer Texas Instruments
File Size 1.62 MB
Description 48-Bit LVDS
Datasheet download datasheet DS90CR484A Datasheet
Additional preview pages of the DS90CR484A datasheet.

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Full PDF Text Transcription

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DS90CR483A, DS90CR484A www.ti.com SNLS291A – APRIL 2008 – REVISED APRIL 2013 DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES – 33 - 112 MHz Check for Samples: DS90CR483A, DS90CR484A FEATURES 1 •2 Up to 5.38 Gbits/sec Bandwidth • 33 MHz to 112 MHz Input Clock Support • LVDS SER/DES Reduces Cable and Connector Size • Pre-emphasis Reduces Cable Loading Effects • DC Balance Data Transmission Provided by Transmitter Reduces ISI Distortion • Cable Deskew of +/−1 LVDS Data Bit Time (up to 80 MHz Clock Rate) • 5V Tolerant TxIN and Control Input Pins • Flow Through Pinout for Easy PCB Design • +3.
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