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DS90CR484 - 48-Bit LVDS Channel Link Serializer/Deserializer

Description

The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a ninth LVDS link.

Features

  • n n n n n n n n n n n Up to 5.38 Gbits/sec bandwidth 33 MHz to 112 MHz input clock support LVDS SER/DES reduces cable and connector size Pre-emphasis reduces cable loading effects DC balance data transmission provided by transmitter reduces ISI distortion Cable Deskew of +/.
  • 1 LVDS data bit time (up to 80 MHz Clock Rate) 5V Tolerant TxIN and control input pins Flow through pinout for easy PCB design +3.3V supply voltage Transmitter rejects cycle-to-cycle jitter Conforms to ANSI/TIA/EIA-64.

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Datasheet preview – DS90CR484

Datasheet Details

Part number DS90CR484
Manufacturer National Semiconductor
File Size 348.65 KB
Description 48-Bit LVDS Channel Link Serializer/Deserializer
Datasheet download datasheet DS90CR484 Datasheet
Additional preview pages of the DS90CR484 datasheet.

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Full PDF Text Transcription

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DS90CR483/DS90CR484 48-Bit LVDS Channel Link Serializer / Deserializer February 2000 DS90CR483 / DS90CR484 48-Bit LVDS Channel Link Serializer/Deserializer General Description The DS90CR483 transmitter converts 48 bits of CMOS/TTL data into eight LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a ninth LVDS link. Every cycle of the transmit clock 48 bits of input data are sampled and transmitted. The DS90CR484 receiver converts the LVDS data streams back into 48 bits of CMOS/TTL data. At a transmit clock frequency of 112MHz, 48 bits of TTL data are transmitted at a rate of 672Mbps per LVDS data channel. Using a 112MHz clock, the data throughput is 5.38Gbit/s (672Mbytes/s).
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