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DS92LV3241, DS92LV3242
www.ti.com
SNLS314D – SEPTEMBER 2009 – REVISED APRIL 2013
DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
Check for Samples: DS92LV3241, DS92LV3242
FEATURES
1
•2 Wide Operating Range Embedded Clock SER/DES – Up to 32-bit Parallel LVCMOS Data – 20 to 85 MHz Parallel Clock – Up to 2.72 Gbps Application Data Paylod
• Selectable Serial LVDS Bus Width – Dual Lane Mode (20 to 50 MHz) – Quad Lane Mode (40 to 85 MHz)
• Simplified Clocking Architecture – No Separate Serial Clock Line – No reference Clock Required – Receiver Locks to Random Data
• On-Chip Signal Conditioning for Robust Serial Connectivity – Transmit Pre-Emphasis – Data Randomization – DC-Balance Encoding – Receive Channel Deskew – Supports up to 10m CAT-5 at 2.