Datasheet4U Logo Datasheet4U.com

LMK04616 - Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner

Description

The LMK0461x device family is the industry’s highest performance and lowest power jitter cleaner with JESD204B support.

The 16 clock outputs can be configured to drive eight JESD204B converters or other logic devices using device and SYSREF clocks.

Features

  • 1 Dual-loop PLL architecture.
  • Ultra low noise (10 kHz to 20 MHz):.
  • 48-fs RMS jitter at 1966.08 MHz.
  • 50-fs RMS jitter at 983.04 MHz.
  • 61-fs RMS jitter at 122.88 MHz.
  • 165-dBc/Hz noise floor at 122.88 MHz.
  • JESD204B support.
  • Single shot, pulsed, and continuous SYSREF.
  • 16 differential output clocks in 8 frequency groups.
  • Programmable output swing between 700 mVpp to 1600 mVpp.
  • Each output pair c.

📥 Download Datasheet

Datasheet preview – LMK04616

Datasheet Details

Part number LMK04616
Manufacturer Texas Instruments
File Size 2.32 MB
Description Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner
Datasheet download datasheet LMK04616 Datasheet
Additional preview pages of the LMK04616 datasheet.

📁 Similar Datasheet

  • LMK04000 - Low-Noise Clock Jitter Cleaner (National Semiconductor)
  • LMK04031B - Precision Clock Conditioners Low-Noise Clock Jitter Cleaner (National Semiconductor Corporation)
  • LMK042 - MULTILAYER CERAMIC CAPACITORS (Taiyo Yuden)
  • LMK04800 - Low-Noise Clock Jitter Cleaner (National Semiconductor)
  • LMK01000 - (LMK01000 - LMK01020) 1.6 GHz High Performance Clock Buffer (National Semiconductor)
  • LMK01010 - (LMK01000 - LMK01020) 1.6 GHz High Performance Clock Buffer (National Semiconductor)
  • LMK01020 - (LMK01000 - LMK01020) 1.6 GHz High Performance Clock Buffer (National Semiconductor)
  • LMK02000 - Precision Clock Conditioner (National Semiconductor)
  • LMK02002 - Precision Clock Conditioner (National Semiconductor)
  • LMK03000 - (LMK03000 / LMK03001) Precision Clock Conditioner (National Semiconductor)
Other Datasheets by Texas Instruments
  • LMK04610 - Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner
  • LMK04000 - Family Low-Noise Clock Jitter Cleaner
  • LMK04001 - Family Low-Noise Clock Jitter Cleaner
  • LMK04002 - Family Low-Noise Clock Jitter Cleaner
  • LMK04010 - Family Low-Noise Clock Jitter Cleaner
  • LMK04011 - Family Low-Noise Clock Jitter Cleaner
  • LMK04031 - Family Low-Noise Clock Jitter Cleaner
  • LMK04033 - Family Low-Noise Clock Jitter Cleaner

Full PDF Text Transcription

Click to expand full text
Product Folder Order Now Technical Documents Tools & Software Support & Community LMK04616 SNAS663B – MARCH 2017 – REVISED JULY 2019 LMK04616 Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual-Loop PLLs 1 Features •1 Dual-loop PLL architecture • Ultra low noise (10 kHz to 20 MHz): – 48-fs RMS jitter at 1966.08 MHz – 50-fs RMS jitter at 983.04 MHz – 61-fs RMS jitter at 122.88 MHz • –165-dBc/Hz noise floor at 122.
Published: |