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LMK05028 - Low-Jitter Dual-Channel Network Synchronizer Clock

General Description

The LMK05028 is a high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and superior hitless switching performance to meet the stringent timing requirements of communications infrastructure and industrial applications.

Key Features

  • 1 Two Independent PLL Channels Featuring:.
  • Jitter: 150-fs RMS for Outputs ≥ 100 MHz.
  • Phase Noise:.
  • 112 dBc/Hz at 100-Hz Offset for 122.88 MHz.
  • Hitless Switching: 50-ps Phase Transient With Phase Cancellation.
  • Programmable Loop Bandwidth With Fastlock.
  • Standards-Compliant Synchronization and Holdover Using a Low-Cost TCXO/OCXO.
  • Any Input to Any Output Frequency Translation.
  • Four Reference Clock Inputs.
  • Priori.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Order Now Technical Documents Tools & Software Support & Community LMK05028 SNAS724A – FEBRUARY 2018 – REVISED APRIL 2018 LMK05028 Low-Jitter Dual-Channel Network Synchronizer Clock With EEPROM 1 Features •1 Two Independent PLL Channels Featuring: – Jitter: 150-fs RMS for Outputs ≥ 100 MHz – Phase Noise: –112 dBc/Hz at 100-Hz Offset for 122.