PLL1707-Q1 Datasheet | Texas Instruments

FEATURES - Qualified for Automotive Applications - 27-MHz Master Clock Input - Generated Audio System Clock - SCKO0: 768 f S (f S = 44.1 k Hz) - SCKO1: 768 f S, 512 f S (f S = 48 k Hz) - SCKO2: 256 f S (f S = 32, 44.1, 48, 64, 88.2, 96 k Hz) - SCKO3: 384 f S (f S = 32, 44.1, 48, 64, 88.2, 96 k Hz) - Zero PPM Error Output Clocks - Low Clock Jitter: 50 ps (Typical) - Multiple Sampling Frequencies: f S = 32, 44.1, 48, 64, 88.2, 96 k Hz - 3.3-V Single Power Supply - Parallel Control - Package: 20-Pin SSOP (150 mil), Lead-Free Product APPLICATIONS - HDD + DVD Recorders - DVD Recorders - HDD Recorders - DVD Players - DVD Add-On Cards for Multimedia PCs - Digital HDTV Systems - Set-Top Boxes DESCRIPTION The PLL1707 is a low-cost phase-locked loop (PLL) multiclock generator. The PLL1707 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1707 can be controlled by sampling frequency-control pins. The device gives customers both cost and space savings by eliminating external ponents and enables customers to achieve the very low-jitter performance needed for high performance audio DACs and/or ADCs. The PLL1707 is ideal for MPEG-2 applications that use a 27-MHz master clock such as DVD recorders, HDD recorders, DVD add-on cards for multimedia PCs, digital HDTV systems, and set-top boxes. FUNCTIONAL BLOCK DIAGRAM SR FS2 FS1 CSEL VCC AGND VDD1- 3 DGND1- 3 Reset XT1 OSC XT2 Mode Control Interface Power Supply PLL2 PLL1 Divider Divider Divider MCKO1...