SCAN921226 Overview
The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The SCAN921226 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and recovers parallel clock. Both devices are pliant with IEEE 1149.1 Standard for Boundary Scan Test.
SCAN921226 Key Features
- 2 IEEE 1149.1 (JTAG) pliant and At-Speed BIST Test Mode
- Clock Recovery From PLL Lock to Random Data Patterns
- Specified Transition Every Data Transfer Cycle
- Chipset (Tx + Rx) Power Consumption < 600
- Single Differential Pair Eliminates Multi
- 800 Mbps Serial Bus LVDS Data Rate (At 80
- 10-Bit Parallel Interface for 1 Byte Data Plus 2
- Synchronization Mode and LOCK Indicator
- Programmable Edge Trigger on Clock
- High Impedance on Receiver Inputs When
