Texas Instruments SCAN921226
The SCAN921226 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and recovers parallel clock. Both devices are compliant with IEEE 1149.1 Standard for Boundary Scan Test. The pair of devices also features an at-speed BIST mode which allows the interconnects between the Serializer and Deserializer to be verified at-speed.FEATURES
1●2 IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Mode.
● Clock Recovery From PLL Lock to Random Data Patterns.
● Specified Transition Every Data Transfer Cycle
● Chipset (Tx + Rx) Power Consumption < 600 mW (typ) @ 80 MHz
● Single Differential Pair Eliminates Multi- Channel Skew
● 800 Mbps Serial Bus LVDS Data Rate (At 80 MHz Clock)
● 10-Bit Parallel Interface for 1 Byte Data Plus 2 Control Bits
● Synchronization Mode and LOCK Indicator
● Programmable Edge Trigger on Clock
● High Impedance on Receiver Inputs When Power is Off
● Bus LVDS Serial Output Rated for 27Ω Load
● Small 49-Lead NFBGA Package
DESCRIPTION
The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. IEEE 1149.1 features provide the design or test engineer access via a standard Test Access Port (TAP) to the backplane or cable interconnects and the ability to verify differential signal integrity. The SCAN921025 transmits data over backplanes or cable.