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SCAN921226 - 30-80 MHz 10-Bit Bus LVDS Serializer and Deserializer

This page provides the datasheet information for the SCAN921226, a member of the SCAN921025 30-80 MHz 10-Bit Bus LVDS Serializer and Deserializer family.

Datasheet Summary

Description

The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock.

The SCAN921226 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and recovers parallel clock.

Features

  • provide the design or test engineer access via a standard Test Access Port (TAP) to the backplane or cable interconnects and the ability to verify differential signal integrity. The pair of devices also features an at-speed BIST mode which allows the interconnects between the Serializer and Deserializer to be verified at-speed. The SCAN921025 transmits data over backplanes or cable. The single differential pair data path makes PCB design easier. In addition, the reduced cable, PCB trace count, a.

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Datasheet Details

Part number SCAN921226
Manufacturer National Semiconductor
File Size 559.60 KB
Description 30-80 MHz 10-Bit Bus LVDS Serializer and Deserializer
Datasheet download datasheet SCAN921226 Datasheet
Additional preview pages of the SCAN921226 datasheet.

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Full PDF Text Transcription

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SCAN921025/SCAN921226 30-80 MHz 10 Bit BLVDS Serializer and Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST SCAN921025 and SCAN921226 OBSOLETE October 24, 2011 30-80 MHz 10 Bit Bus LVDS Serializer and Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST General Description The SCAN921025 transforms a 10-bit wide parallel LVCMOS/LVTTL data bus into a single high speed Bus LVDS serial data stream with embedded clock. The SCAN921226 receives the Bus LVDS serial data stream and transforms it back into a 10-bit wide parallel data bus and recovers parallel clock. Both devices are compliant with IEEE 1149.1 Standard for Boundary Scan Test. IEEE 1149.
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