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SMJ320C30 - DIGITAL SIGNAL PROCESSOR

General Description

D Two 32-Bit External Ports (24- and 13-Bit Address) D Two Serial Ports With Support for 8-/16-/24-/32-Bit Transfers D Packaging -- 181-Pin Grid Array Ceramic Package (GB Suffix) -- 196-Pin Ceramic Quad Flatpack With Nonconductive Tie-Bar (HFG Suffix) D SMD Approval for 40- and 50-MHz Versions D Tw

Key Features

  • General-purpose.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SMJ320C30 DIGITAL SIGNAL PROCESSOR SGUS014H -- FEBRUARY 1991 -- REVISED JUNE 2004 2 D --55°C to 125°C Operating Temperature Range, QML Processing D Processed to MIL-PRF-38535 (QML) D Performance -- SMJ320C30-40 (50-ns Cycle) 40 MFLOPS 20 MIPS -- SMJ320C30-50 (40-ns Cycle) 50 MFLOPS 25 MIPS D Two 1K-Word × 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks D Validated Ada Compiler D 64-Word × 32-Bit Instruction Cache D 32-Bit Instruction and Data Words, 24-Bit Addresses D 40/32-Bit Floating-Point/Integer Multiplier and Arithmetic Logic Unit (ALU) D Parallel ALU and Multiplier Execution in a Single Cycle D On-Chip Direct Memory Access (DMA) Controller for Concurrent I/O and CPU Operation D Integer, Floating-Point, and Logical Operations D One 4K-Word × 32-Bit Single-Cycle Dual-