SMJ320VC33 Datasheet | Texas Instruments

Features - 1 High-Performance Floating-Point Digital Signal Processor (DSP) - SMx320VC33-150 - 13-ns Instruction Cycle Time - 150 Million Floating-Point Operations per Second (MFLOPS) - 75 Million Instructions per Second (MIPS) - 34K × 32-Bit (1.1-Mbit) On-Chip Words of Dual Access Static Random-Access Memory (SRAM) Configured in 2 × 16K plus 2 × 1K Blocks to Improve Internal Performance - x5 Phase-Locked Loop (PLL) Clock Generator - Very-Low Power: <200 m W at 150 MFLOPS - 32-Bit High-Performance CPU - 16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations - Four Internally Decoded Page Strobes to Simplify Interface to I/O and Memory Devices - Boot-Program Loader - EDGEMODE Selectable External Interrupts - 32-Bit Instruction Word, 24-Bit Addresses - Eight Extended-Precision Registers - Fabricated Using the 0.18-μm (leff - Effective Gate Length) TImeline™ Technology by Texas Instruments - On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1 (JTAG) - On-Chip Memory-Mapped Peripherals: - One Serial Port - Two 32-Bit Timers - Direct Memory Access (DMA) Coprocessor for Concurrent I/O and CPU Operation - 164-Pin Low-Profile Quad Flatpack (HFG Suffix) - 144-Pin Non-Hermetic Ceramic Ball Grid Array (CBGA) (GNM Suffix) - Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs) - Two Low-Power Modes - Two- and Three-Operand Instructions - Parallel Arithmetic/Logic Unit (ALU) and Multiplier Execution in a Single Cycle - Block-Repeat Capability - Zero-Overhead Loops With Single-Cycle Branches - Conditional Calls and Returns - Interlocked Instructions for Multiprocessing...