SN54ABT126 Datasheet | Texas Instruments

description /ordering information - No internal connection The ’ABT126 bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. ORDERING INFORMATION PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING - RGY Tape and reel SN74ABT126RGYR AB126 - 40°C to 85°C PDIP - N SOIC - D SOP - NS SSOP - DB Tube Tube Tape and reel Tape and reel Tape and reel SN74ABT126N SN74ABT126D SN74ABT126DR SN74ABT126NSR SN74ABT126DBR SN74ABT126N ABT126 ABT126 AB126 TSSOP - PW Tube Tape and reel SN74ABT126PW SN74ABT126PWR AB126 CDIP - J - 55°C to 125°C LCCC - FK Tube Tube SNJ54ABT126J SNJ54ABT126FK SNJ54ABT126J SNJ54ABT126FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at .ti./sc/package....