SN54ABT16646 Datasheet | Texas Instruments

description The ’ABT16646 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’ABT16646 devices. SN54ABT16646 . . . WD PACKAGE SN74ABT16646 . . . DGG OR DL PACKAGE (TOP VIEW) 1DIR 1 1CLKAB 2 1SAB 3 GND 4 1A1 5 1A2 6 VCC 7 1A3 8 1A4 9 1A5 10 GND 11 1A6 12 1A7 13 1A8 14 2A1 15 2A2 16 2A3 17 GND 18 2A4 19 2A5 20 2A6 21 VCC 22 2A7 23 2A8 24 GND 25 2SAB 26 2CLKAB 27 2DIR 28 56 1OE 55 1CLKBA 54 1SBA 53 GND 52 1B1 51 1B2 50 VCC 49 1B3 48 1B4 47 1B5 46 GND 45 1B6 44 1B7 43 1B8 42 2B1 41 2B2 40 2B3 39 GND 38 2B4 37 2B5 36 2B6 35 VCC 34 2B7 33 2B8 32 GND 31 2SBA 30 2CLKBA 29 2OE Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. The direction control (DIR) determines which bus receives data when OE is low. In the isolation mode (OE high), A data can be stored in one register and/or B data can be stored in the other register. When an output function is disabled, the input function is still enabled and can be used to store and transmit data. Only one of the two buses, A or B, can be driven at a time. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup...