SN54ABT652A Datasheet | Texas Instruments

description SN54ABT652A, SN74ABT652A OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS072F - JANUARY 1991 - REVISED MAY 1997 SN54ABT652A . . . JT OR W PACKAGE SN74ABT652A . . . DB, DW, NT, OR PW PACKAGE (TOP VIEW) CLKAB 1 SAB 2 OEAB 3 A1 4 A2 5 A3 6 A4 7 A5 8 A6 9 A7 10 A8 11 GND 12 24 VCC 23 CLKBA 22 SBA 21 OEBA 20 B1 19 B2 18 B3 17 B4 16 B5 15 B6 14 B7 13 B8 SN54ABT652A . . . FK PACKAGE (TOP VIEW) OEAB SAB CLKAB NC VCC CLKBA SBA These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select either real-time or stored data for transfer. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input selects real-time data, and a high input selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’ABT652A. 4 3 2 1 28 27 26 A1 5 25 OEBA A2 6 24 B1 A2 7 23 B2 NC 8 22 NC A4 9 21 B3 A5 10 20 B4 A6 11 19 B5 12 13 14 15 16 17 18 A7 A8 GND NC B8 B7 B6 - No internal connection Data on the A- or B-data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control inputs. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. To ensure the high-impedance state during power...