SN54ALVTH16827 Datasheet | Texas Instruments

D State-of-the-Art Advanced Bi CMOS Technology (ABT) Widebus ™ Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation D Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 2.3-V to 3.6-V VCC ) D Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C D High Drive (- 24/24 m A at 2.5-V and - 32/64 m A at 3.3-V VCC) D Power Off Disables Outputs, Permitting Live Insertion D High-Impedance State During Power Up and Power Down Prevents Driver Conflict D Uses Bus Hold on Data Inputs in Place of External Pullup/Pulldown Resistors to Prevent the Bus From Floating D Auto3-State Eliminates Bus Current Loading When Output Exceeds VCC + 0.5 V D Latch-Up Performance Exceeds 250 m A Per JESD 17 D ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model; and Exceeds 1000 V Using Charged-Device Model, Robotic Method D Flow-Through Architecture Facilitates Printed Circuit Board Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D Package Options Include Plastic...