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• State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
• ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Designed to Facilitate Incident-Wave
Switching for Line Impedances of 25 Ω or Greater
• Distributed VCC and GND Pins Minimize
Noise Generated by the Simultaneous Switching of Outputs
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)
description
These 25-Ω octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
SN54BCT25244 Datasheet
