SN54F573 Overview
Key Specifications
Package: CDIP
Description
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
Key Features
- 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads
- They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers
- J PACKAGE SN74F573
- FK PACKAGE (TOP VIEW) 1Q VCC OE 1D 2D The eight latches of the ′F573 are transparent D-type latches
- While the latch enable (LE) input is high, the Q outputs follow the data (D) inputs
