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SN65LVDS22 - DUAL MULTIPLEXED LVDS REPEATERS

General Description

The SN65LVDS22 and SN65LVDM22 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps.

The receiver outputs can be switched to either or both drivers through the multiplexer control signals S0 and S1.

Key Features

  • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard.
  • Designed for Clock Rates up to 200 MHz (400 Mbps).
  • Designed for Data Rates up to 250 Mbps.
  • Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI.
  • ESD Protection Exceeds 12 kV on Bus Pins.
  • Operates From a Single 3.3-V Supply.
  • Low-Voltage Differential Signaling With Output Voltages of 350 mV Into:.
  • 100-Ω Load (SN65LVDS22).

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Full PDF Text Transcription for SN65LVDS22 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for SN65LVDS22. For precise diagrams, and layout, please refer to the original PDF.

www.ti.com SN65LVDS22 SN65LVDM22 SLLS315C – DECEMBER 1998 – REVISED JUNE 2002 DUAL MULTIPLEXED LVDS REPEATERS FEATURES • Meets or Exceeds the Requirements of ANSI TIA/EIA...

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REPEATERS FEATURES • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 Standard • Designed for Clock Rates up to 200 MHz (400 Mbps) • Designed for Data Rates up to 250 Mbps • Pin Compatible With SN65LVDS122 and SN65LVDT122, 1.5 Gbps 2x2 Crosspoint Switch From TI • ESD Protection Exceeds 12 kV on Bus Pins • Operates From a Single 3.3-V Supply • Low-Voltage Differential Signaling With Output Voltages of 350 mV Into: – 100-Ω Load (SN65LVDS22) – 50-Ω Load (SN65LVDM22) • Propagation Delay Time; 4 ns Typ • Power Dissipation at 400 Mbps of 150 mW • Bus Pins Are High Impedance When Disabled or With VCC Less Than 1.

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