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SN65LVDS94 Datasheet LVDS SERDES RECEIVER

Manufacturer: Texas Instruments

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General Description

The SN65LVDS94 LVDS serdes (serializer/deserializer) receiver contains four serial-in 7-bit parallel-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.

These functions allow receipt of synchronous data from a compatible transmitter, such as the SN65LVDS93 and SN65LVDS95, over five balanced-pair conductors and expansion to 28 bits of single-ended LVTTL synchronous data at a lower transfer rate.

When receiving, the high-speed LVDS data is received and loaded into registers at the rate seven times the LVDS input clock (CLKIN).

Overview

SN65LVDS94 www.ti.com SLLS298F – MAY 1998 – REVISED JANUARY 2006 LVDS SERDES.

Key Features

  • 4:28 Data Channel Expansion at up to 1.904 Gigabits per Second Throughput.
  • Suited for Point-to-Point Subsystem Communication With Very Low EMI.
  • 4 Data Channels and Clock Low-Voltage Differential Channels in and 28 Data and Clock Out Low-Voltage TTL Channels Out.
  • Operates From a Single 3.3-V Supply and 250 mW (Typ).
  • 5-V Tolerant SHTDN Input.
  • Rising Clock Edge Triggered Outputs.
  • Bus Pins Tolerate 4-kV HBM ESD.
  • Packaged in Thi.

More Datasheets from Texas Instruments

Part Number Description
SN65LVDS93 LVDS SERDES TRANSMITTER
SN65LVDS93A TRANSMITTER
SN65LVDS93A-Q1 TRANSMITTER
SN65LVDS95 LVDS SERDES TRANSMITTER
SN65LVDS95-EP LVDS SERDES TRANSMITTER
SN65LVDS95-Q1 LVDS SERDES TRANSMITTER
SN65LVDS96 LVDS SERDES RECEIVER
SN65LVDS9637 High-Speed Differential Line Receivers
SN65LVDS9637A HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDS9637B HIGH-SPEED DIFFERENTIAL RECEIVERS