Datasheet Summary
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LVDS SERDES RECEIVER
SLLS296H
- MAY 1998
- REVISED JULY 2006
Features
- 3:21 Data Channel pression at up to 1.428 Gigabits/s Throughput
- Suited for Point-to-Point Subsystem munication With Very Low EMI
- 3 Data Channels and Clock Low-Voltage Differential Channels in and 21 Data and Clock Low-Voltage TTL Channels Out
- Operates From a Single 3.3-V Supply and 250 mW (Typ)
- 5-V Tolerant SHTDN Input
- Rising Clock Edge Triggered Outputs
- Bus Pins Tolerate 4-kV HBM ESD
- Packaged in Thin Shrink Small-Outline
Package With 20 Mil Terminal Pitch
- Consumes <1 mW When Disabled
- Wide Phase-Lock Input Frequency Range
20 MHz to 68 MHz
- No External ponents...