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D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
D High-Drive Outputs (–32-mA IOH,
64-mA IOL )
D Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Plastic (N) and Ceramic (J) DIPs
SN54ABT640, SN74ABT640 OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS104C – FEBRUARY 1991 – REVISED JANUARY 1997
SN54ABT640 . . . J PACKAGE SN74ABT640 . . .