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SN74ACT373-EP Datasheet Octal D-type Transparent Latches

Manufacturer: Texas Instruments

Overview: D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of −55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D 4.5-V to 5.5-V VCC Operation † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. SN74ACT373ĆEP OCTAL DĆTYPE TRANSPARENT LATCH WITH 3ĆSTATE OUTPUTS SCAS726 − OCTOBER 2003 D Inputs Accept Voltages to 5.

General Description

/ordering information This 8-bit latch

Key Features

  • 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches are D-type transparent latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can.

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