Texas Instruments SN74ACT74
The ’ACT74 dual positive-edge-triggered devices are D-type flip-flops. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse.| Part No. | SN74ACT74 |
|---|---|
| Datasheet | SN74ACT74 Download |
| Manufacturer |  Texas Instruments |
| Description | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS |
| Buy | Stock & Price |
D 4.5-V to 5.5-V VCC Operation D Inputs Accept Voltages to 5.5 V SN54ACT74, SN74ACT74 DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOPS WITH CLEAR AND PRESET SCAS520H − AUGUST 1995 − REVISED OCTOBER 2003 D Max tpd of 10.5 ns at 5 V D Inputs Are TTL-Voltage Compatible SN54ACT74 . . . J OR W PACKAGE SN74ACT74 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW) 1CLR 1 1D 2 1CLK 3 1PRE 4 1Q 5 1Q 6 GND 7 14 VCC 13 2CLR 12 2D 11 2CLK 10 2PRE 9 2Q 8 2Q SN54ACT74 . . . FK PACKAGE (TOP VIEW) 1D 1CLR NC VCC 2CLR 1CLK NC 1PRE NC 1Q 3 2 1 20 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2D NC 2CLK NC 2PRE 1Q GND NC 2Q 2Q description/ordering information NC − No internal connection A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at D can be changed without affecting the levels at the outputs.
