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SN74AHC125-Q1 - QUADRUPLE BUS BUFFER GATE

Description

The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs.

Each output is disabled when the associated output-enable (OE) input is high.

When OE is low, the respective gate passes the data from the A input to its Y output.

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Datasheet preview – SN74AHC125-Q1

Datasheet Details

Part number SN74AHC125-Q1
Manufacturer Texas Instruments
File Size 857.74 KB
Description QUADRUPLE BUS BUFFER GATE
Datasheet download datasheet SN74AHC125-Q1 Datasheet
Additional preview pages of the SN74AHC125-Q1 datasheet.

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Full PDF Text Transcription

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DQualified for Automotive Applications DESD Protection Exceeds 1000 V Per MIL-STD-883, Method 3015; Exceeds 150 V Using Machine Model (C = 200 pF, R = 0) DEPIC (Enhanced-Performance Implanted CMOS) Process DOperating Range 2-V to 5.5-V VCC DLatch-Up Performance Exceeds 250 mA Per JESD 17 SN74AHC125-Q1 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCLS525A − AUGUST 2003 − REVISED APRIL 2008 D OR PW PACKAGE (TOP VIEW) 1OE 1A 1Y 2OE 2A 2Y GND 1 2 3 4 5 6 7 14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y description/ordering information The SN74AHC125 is a quadruple bus buffer gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
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