SN74AHC244-Q1 Datasheet | Texas Instruments

SN74AHC244ĆQ1 OCTAL BUFFER/DRIVER WITH 3ĆSTATE OUTPUTS SCLS526A - AUGUST 2003 - REVISED APRIL 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 1500 V Per MIL-STD-883, Method 3015; Exceeds 150 V Using Machine Model (C = 200 p F, R = 0) D EPIC (Enhanced-Performance Implanted CMOS) Process D Operating Range 2-V to 5.5-V VCC description/ordering information This octal buffer/driver is designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. DW OR PW PACKAGE (TOP VIEW) 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 2 3 4 5 6 7 8 9 10 20 VCC 19 2OE 18 1Y1 17 2A4 16 1Y2 15 2A3 14 1Y3 13 2A2 12 1Y4 11 2A1 The SN74AHC244 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION{ PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING - 40°C to 125°C SOIC - DW Tape and reel TSSOP - PW Tape and reel SN74AHC244QDWRQ1 SN74AHC244QPWRQ1 AHC244Q1 AHC244Q1 † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at http://.ti.. ‡ Package drawings, thermal data, and symbolization are available at http://.ti./packaging. FUNCTION TABLE (each 4-bit buffer/driver) INPUTS OE A OUTPUT...