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SN74AHCT138QĆQ1 3ĆLINE TO 8ĆLINE DECODER/DEMULTIPLEXER
D Qualified for Automotive Applications D EPIC (Enhanced-Performance Implanted
CMOS) Process
D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed
Memory Decoders and Data-Transmission Systems
D Incorporates Three Enable Inputs to
Simplify Cascading and/or Data Reception
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds 2000 V Per
MIL-STD-833, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
SGDS022A − FEBRUARY 2002 − REVISED APRIL 2008
D OR PW PACKAGE (TOP VIEW)
A1 B2 C3 G2A 4 G2B 5 G1 6 Y7 7 GND 8
16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6
description
The SN74AHCT138Q 3-line to 8-line decoder/demultiplexer is designed to be used in high-performance memory-deco