SN74AHCT373 Datasheet | Texas Instruments

Features - Inputs Are TTL-Voltage patible - Latch-up performance exceeds 250 m A per JESD 2 Description The 'AHCT373 devices are octal-transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. Device Information PART NUMBER PACKAGE1 BODY SIZE2 J (CDIP, 20) 24.2 mm × 6.92 mm SN54AHCT373 W (CFP, 20) 13.09 mm × 6.92 mm FK (LCCC, 20) 8.89 mm × 8.89 mm DB (SSOP, 20) 7.20 mm × 5.30 mm DW (SOIC, 20) 12.80 mm × 7.50 mm NS (SOP, 20) 12.6 mm × 5.3 mm N (PDIP, 20) 25.40 mm × 6.35 mm PW (TSSOP, 20) 6.50 mm × 4.40 mm Logic Diagram (Positive Logic) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA. SN54AHCT373, SN74AHCT373 SCLS239N - OCTOBER 1995 - REVISED AUGUST 2023 .ti. Table of Contents 1 Features 1 2 Description 1 3 Revision History 2 4 Pin Configuration and Functions 3 5 Specifications 4 5.1 Absolute Maximum Ratings 4 5.2 ESD Ratings 4 5.3 Remended Operating Conditions 4 5.4 Thermal Information 5 5.5 Electrical Characteristics 5 5.6 Timing Requirements, VCC = 5 V ± 0.5 V 5 5.7 Switching Characteristics, VCC = 5 V ± 0.5 V 6 5.8 Noise Characteristics....