SN74ALS667 Datasheet | Texas Instruments

description These 8-bit D-type transparent latches are designed specifically for storing the contents of the input data bus, plus reading back the stored data onto the input data bus. In addition, they provide a 3-state buffer-type output and are easily utilized in bus-structured applications. SN74ALS666 . . . DW OR NT PACKAGE (TOP VIEW) OERB 1 OE1 2 1D 3 2D 4 3D 5 4D 6 5D 7 6D 8 7D 9 8D 10 CLR 11 GND 12 24 VCC 23 OE2 22 1Q 21 2Q 20 3Q 19 4Q 18 5Q 17 6Q 16 7Q 15 8Q 14 PRE 13 LE SN74ALS667 . . . DW OR NT PACKAGE (TOP VIEW) While the latch enable (LE) is high, the Q outputs of the SN74ALS666 follow the data (D) inputs. The Q outputs of the SN74ALS667 provide the inverse of the data applied to its D inputs. The Q or Q output of both devices is in the high-impedance state if either output-enable (OE1 or OE2) input is at a high logic level. Read back is provided through the read-back control (OERB) input. When OERB is taken low, the data present at the output of the data latches passes back onto the input data bus. When OERB is taken high, the output of the data latches is isolated from the D inputs. OERB does not affect the internal operation of the latches; however, caution should be exercised to avoid a bus conflict. OERB 1 OE1 2 1D 3 2D 4 3D 5 4D 6 5D 7 6D 8 7D 9 8D 10 CLR 11 GND 12 24 VCC 23 OE2 22 1Q 21 2Q 20 3Q 19 4Q 18 5Q 17 6Q 16 7Q 15 8Q 14 PRE 13 LE The SN74ALS666 and SN74ALS667 are characterized for operation from 0°C to 70°C. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 1995, Texas Instruments Incorporated 1 SN74ALS666, SN74ALS667 8-BIT D-TYPE TRANSPARENT READ-BACK LATCHES WITH 3-STATE OUTPUTS SDAS227A - JUNE 1984 - REVISED JANUARY 1995 logic symbols† SN74ALS666 2 OE1 23 OE2 1 OERB 14 PRE 11 CLR 13 LE 3...