SN74ALS841 Datasheet | Texas Instruments

description SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C - DECEMBER 1983 - REVISED JANUARY 1995 SN74ALS841, SN74AS841A . . . DW OR NT PACKAGE (TOP VIEW) OE 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 9D 10 10D 11 GND 12 24 VCC 23 1Q 22 2Q 21 3Q 20 4Q 19 5Q 18 6Q 17 7Q 16 8Q 15 9Q 14 10Q 13 LE These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D inputs. A buffered output-enable (OE) input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup ponents. SN74ALS842 . . . DW OR NT PACKAGE (TOP VIEW) OE 1 1D 2 2D 3 3D 4 4D 5 5D 6 6D 7 7D 8 8D 9 9D 10 10D 11 GND 12 24 VCC 23 1Q 22 2Q 21 3Q 20 4Q 19 5Q 18 6Q 17 7Q 16 8Q 15 9Q 14 10Q 13 LE OE does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off. The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright © 1995, Texas Instruments Incorporated 1 SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS059C - DECEMBER...