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SN74ALVC125 Datasheet PDF

Texas Instruments SN74ALVC125

The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
Part No. SN74ALVC125
Datasheet SN74ALVC125 Download
Manufacturer
Texas Instruments
Description QUADRUPLE BUS BUFFER GATE
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SN74ALVC125 datasheet page 1 preview

FEATURES

● Operates from 1.65 V to 3.6 V
● Max tpd of 2.8 ns at 3.3 V
● ±24-mA Output Drive at 3.3 V
● Latch-up Performance Exceeds 250 mA Per JESD 17
● ESD Performance Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) SN74ALVC125 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES110H – JULY 1997 – REVISED SEPTEMBER 2004 D, DGV, NS, OR PW PACKAGE (TOP VIEW) 1OE 1 1A 2 1Y 3 2OE 4 2A 5 2Y 6 GND 7 14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y

DESCRIPTION

/ORDERING INFORMATION This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. TA -40°C to 85°C ORDERING INFORMATION PACKAGE (1) ORDERABLE PART NUMBER SOIC - D Tube Tape and reel SN74ALVC125D SN74ALVC125DR SOP - NS Tape and reel SN74ALVC125NS...
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