SN74AUC2G126 Datasheet PDF (DUAL BUS BUFFER GATE) | Download Texas Instruments SN74AUC2G126

SN74AUC2G126 - DUAL BUS BUFFER GATE

Description

This dual bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC2G126 is a dual bus driver/line driver with 3-state outputs.

The outputs are disabled when the associated output-enable (OE) input is low.

Features

Available in the Texas Instruments NanoFree™ Package.
Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation.
Ioff Supports Partial-Power-Down Mode Operation.
Sub-1-V Operable.
Max tpd of 1.9 ns at 1.8 V.
Low Power Consumption, 10 µA at 1.8 V.
±8-mA Output Drive at 1.8 V.
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
ESD Protection Exceeds JESD 22.
200.

Datasheet Details

Part number	SN74AUC2G126
Manufacturer	Texas Instruments
File Size	805.37 KB
Description	DUAL BUS BUFFER GATE
Datasheet	SN74AUC2G126 Datasheet
Additional preview pages of the SN74AUC2G126 datasheet.

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Full PDF Text Transcription

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www.ti.com SN74AUC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES533C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • Available in the Texas Instruments NanoFree™ Package • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • Ioff Supports Partial-Power-Down Mode Operation • Sub-1-V Operable • Max tpd of 1.9 ns at 1.8 V • Low Power Consumption, 10 µA at 1.8 V • ±8-mA Output Drive at 1.

Published: Feb 6, 2020 |